Standardized welded wire modules



Jan. 31, 1967 W G RElMANN 3,302,066

STANDARDIZED WELDED WIRE MODULES Filed Nov. 6. 1961 7 Sheets-Sheet 1 'l--JZV -IZV 5 ,ef Cf e2 Jan. 31, 1967 Filed Nov. 6, 1961 7 Sheets-Sheet 2Jam-3l, 1967 w. G. REIMANN 3,302,065

STANDARDIZED WELDED WIRE MODULES Filed Nov. 6. 1961 n 7 Sheets-Sheet 5Jan' 31, 1967 w. G. REIMANN STANDARDIZED WELDED WIRE MODULES 7Sheets-$heet 4 Filed Nov. 6. 1961 J.. j ll E I 0 2 Q PH 01 40.1 FL T. lI l T 1 i ri j Q wir VL Jan- '31, 1967 w. G. REIMANN STANDARDIZED WELDEDWIRE MODULES 7 Sheets-Sheet 5 Filed Nov. e. 1961 ,MMMMZMMMW iii 0 MZ Zim865555@ n .a 6a/@w ,n M 666 .fw/44444 JH@ n 22m ,e Mmzzzzz Y .m i225/.0. 60 W M Z W 9999999@ u 777W f @77777 d .C 55555 JN0 w 535W V6 M533311.12111 Y 4 Ewg w 4 af/Ww r ffffff QW W M .am a 70,/ z bzw/Jann,

Jan. 3l, 1967. w. G. REIMANN 3,302,066

STANDARDIZED WELDED WIRE MODULES Filed Nov. 6. 1961 7 Sheets-Sheet 6 a aea ea .27 A zz i a l l '1 Hill? Mal-v' Jan. 3l, 1967 w. G. REIMANNSTANDARDIZED WELDED WIRE MODULES '7 Sheets-Sheet '7 Filed N0v 6. 1961 e.ir/

United States Patent O 3,302,066 STANDARDIZED WELDED WIRE MODULESWilliam G. Reimann, Los Angeles, Calif., assignor to Litton Systems,Inc., Beverly Hills, Calif. Filed Nov. 6, 1961, Ser. No. 150,546 15Claims. (Cl. 317-101) This invention relates to three-dimensionalelectronic circuit packages using welded wire connections.

In the eld of electronic circuitry, much progress has recently been madein increasing the density of component packaging. These techniques inwhich electronic components are stacked side-by-side 'are frequentlyreferred to as cordwood packaging arrangements, as the components -arearranged much like stacks of wood. In these high density arrangements,the problem of interconnecting the components to form circuits is mostchallenging. In the past, the leads have been interconnected principallyby either point-to-point wiring or by printed circuit boards.

Point-to-point wiringV techniques for cordwood packaging arrangementshas the advantage of providing about the densest component packagingwhich is possible. However, point-to-point modules are dicult andexpensive to construct. Their unique compactness necessitates skill andextreme care in assembly, in the custom routing of the nickel ribbonwhich is usually employed for interconnections and in selecting theorder and scheduling of the welds. Furthermore, the high cost of laborrequired for the point-to-point interconnections makes these modulesprohibitively expensive for most applications.

Other arrangements have provided printed circuit boards or theirequivalent in weldable nickel to interconnect the components. Whencircuit boards are provided, however, each circuit must be planned farahead of time and the individual circuit boards must be ordered andfabricated to suit the individual circuit.

An important object of the present invention is to reduce the cost ofwelded wire modules, while maintaining relatively high componentdensities. v

An additional object of the invention is to provide a standardizedwiring format which has design flexibility in the interconnection ofcomponents, and yet which does not require a prolonged period of timebetween the design of the circuit 4and the completed prototype.

Collateral objects of the invention include reducing the level of skillwhich is required in the assembly of welded wire modules and reducingthe lead time required between initial design and production.

In accordance with the present invention, the foregoing objects areachieved through the use of a three-dimensional wiring scheme for acordwood type electronic module, in which connections are made by leadswhich extend in two mutually orthogonal directions perpendicular to theaxes of the resistors and other electronic components which form thebulk of the modules. In addition, the modules are built up of layers inwhich rows of electrical components are mounted upon conductive busstrips. Electrical interconnections are made between the components byconnecting them to the bus strips or by connections through the arraysof mutually orthogonal wires at both ends ofthe components.

Thus, the module in accordance with the present invention is made up ofsuccessive layers of components which may be considered to lie inhorizontal planes, for purposes of reference. The bus strips associatedwith successive layers are employed for common connections between thecomponents of a layer. Thus, in the case of active modules such asmultivibrators or ampliiers, the ladders represent a xed potential suchas ground or another voltage level. In the case of diode logiccircuitry,

ICC

the bus strips may be the common output connection from a serise ofdiodes forming an AND gate.

In general, when an electrical circuit is transformed into modular form,the common connection to two or three or more components may be selectedas the point where the conductive bus strips will be located in thecircuit. Thus, for active modules, the bus strips carry voltages whichare usually connected to several components; similarly, in logiccircuits the bus strips are connected to two or more of the diodes in agate.

Other interconnections between the components in the module are made bywires extending parallel to the horizontal plane of the ladders andperpendicular to the axes of the components. These cross-connections maybe made in two successive planes, one of which is very close to the endsof the components and the other being spaced outwardly from thecomponents by a small distance, which may, for example, be aboutone-eighth inch. External connections to the module are made throughriser wires which extend perpendicular to the plane of the ladders andthe successive layers of the components. The riser wires typically bringreference voltage levels to the module package and provide signalinterconnection leads between modules. In addition to connecting themodule to the outside world, the riser wires serve to interconnect theelectronic components in successive layers within the module.

Unlike point-to-point connections, the ladders, the crossconnections,and the riser wires provide a fixed and orderly reference grid of wireswhich serve to interconnect in a regular manner all of the components ofthe module. Furthermore, subassemblies of components with the respectivebus strips may readily be formed. These subassemblies or layers includea bus strip and a series of components usually of approximately the samediameter stacked closely together and secured to the ladder. Thecomponents lare normally secured physically to the bus strip, either bya welded electrical connection, or, in the case of a component which isnot to be electrically connected to the bus strip, by cement or glue.Necessary interconnections between the electrical components in theparticular layer of the module are then completed, usually by leadsextending parallel to the bus strip. Subsequently, the successivelayers, each with its associated bus strip, are stacked one on top ofthe other, and the vertical riser wires are positioned and welded inplace. These riser wires then interconnect the various layers, bothelectrically and physically. As the last step in completing theelectrical circuit, the riser wires are then clipped to eliminateundesired cross-connections between layers.

The bus stri-ps .associated with each layer are normally formed ofnickel to facilitate welding, and may take the -form of stampings, forexample. The bus strip may also be formed of a pair of wires withregular cross-connections to provide a structure which presents theappearance 0f a ladder. Insulating strips may also be associated withthe conductive wires to form part of the bus strip.

To increase the density of packing, particularly in logic modules, twoor more layers may be combined to form a sandwich construction includingan upper and lower bus strip and interfitting components mounted on thetwo strips. The technique is possible, of course, only whencorresponding layer positions of the rst and second layers are vacantand occupied by electrical components, respectively.

In accordance with another feature of this invention, verticallyextending riser wires occupying opposite positions at the two ends of agiven standardized component space may be energized by the opposedoutputs from a multivibrator. In the case of such logic modules, eachgate arrangement will normally occupy a logic layer. Furthermore, onlyone output from a particular flip-flop or multivibrator ischaracteristically employed in each logic gate. Under these conditions,there will be no conflicting requirements for a given component positionin any one layer as the diode required in the particular componentposition will be connected to but one of the two riser wires whichbracket the component position of the layer in question. Other pairs ofsignals which are similar to the output signals from a multivibrator,may also be conv nected to opposite riser wires to yield the sameadvantages.

Important advantages of the present modular constructionsare derivedfrom the use of the layer subassemblies. This technique permits partialconstruction without all of the parts being present. Specialization ispractical with one employee assembling a number of the smallsubcomponents. Less skilled help may be employed and the module cost isgreatly reduced, in View of the elimination of three-dimensionalassembly work required in point-topoint assemblies. All of thecomponents which are employed are standard so that no special circuitboards or the like are required and the necessity of designing andprocuring custom mechanical components is eliminated. It is thereforepossible to go from a schematic diagram to a prototype module in hours.This is in contrast to the lead time of days or weeks which is requiredwhen special circuit boards or ribbon routing artwork must be prepared,as in the case of point-to-point wiring.

Another advantage arises from the use of a regular pattern of bus stripsand cross-connections. When this construction is employed, the modulesare thermally predictable, and the weight and thermal qualities of thepotting material may be tailored precisely to the heat dissipationrequirements ofthe modules.

Other advantages include reductions in design, drafting and toolingcosts. Furthermore, the modules have the usual advantages of the weldedconstruction including reliable joints, a lack of thermal damage, andcontrolled reproducibility of connections. The regular pattern of theconnections also makes the assembly procedures amenable to automation.

In accordance with another feature of the invention, the length of thelayers included in any particular module may be readily adjusted. Thispermits great ilexibility through tailoring the volume of the module tot the cornplexity of the circuit. Similarly, the length of the layersand thus the volume of the module may be increased to accommodateadditional circuits, by repeating a component pattern on the bus strips.This is in sharp contrast with the rigid limitations imposed by circuitboards, where an entire card, capable of handling several transistorsand -associated components, must often be allocated to a singletransistor.

Various factors contribute to the ease in varying the length of thelayers and the volume of individual modules. First, the bus strips mayeasily be cut to any desired length, and assembly procedures remainsubstantially unchanged. In active modules the fact that the bus stripsnever carry signals facilitates the use of additional circuits in asingle module. Therefore, the only extra leads are the riser wires andthe interconnection leads at the ends of the components, and space forthese wires is automatically provided by the additional length of thelayers.

The novel features which are believed to be characteristic of theinvention, both as to its organization and method of construction andoperation, together with further objects, features and advantagesthereof, will be better understood from the following descriptionconsidered in conjunction with the accompanying drawing in whichillustrative embodiments of the invention are disclosed, by way ofexample. It is to be expressly understood, however, that the drawing isfor the purpose of illustration and description onlly and does notconstitute a limitation of the invention.

In the drawing:

FIG. 1 is a circuit diagram of a typical active data processing circuit;

FIG` 2 is a side view of a welded wire module in accordance with theinvention which implements the active circuit of FIG. 1;

FIGS. 3 and 5 are views showing interconnection arrays on opposite sidesof the welded wire module of FIG. 2;

FIGS. 4 and 6 through 11 are cross-sectional views showing successivemodular layers of electronic components taken along the indicatedsection lines of FIG. 3;

FIG. 12 is a table indicating the electrical connections for certainidentified wires in the interconnection arrays .of FIG. 3;

FIG. 13 is a combined block circuit diagram and schematic view of alogic type Welded wire module, in accordance with the invention;

FIG. 14 is a circuit diagram of an electrical circuit included in one ofthe sandwich layers forming part of the module of FIG. 13;

FIG. 15 is a diagram indicating how the two gates included in thecircuit of FIG. 14 are combined to for-m a single modular layer;

FIGS. 16 and 17 are circuit diagrams of two logic gates included inanother sandwich layer of FIG. 13;

FIG. 18 is a diagram indicating how the logic circuits of FIGS. 16 and17 are combined structurally to form one of the layers included in themodule of FIG. 13;

FIG. 19 -shows a single layer including a conducting bus strip to whichelectrical components are secured;

FIG. 2O shows a partially assembled module and the jigging arrangementswhich are used in its construction;

FIG. 21 shows a module with the completed interconnection array beforeencapsulation, in accordance with the present invention;

FIG. 22 shows the completed Welded wire module encapsulated in plasticand enclosed in a metal channel member; and

FIG. 23 shows an alternative constr-uction for the layers of components.

Referring more particularly to the drawings, FIG. 1 is a driving circuitfor a magnetic drum writing winding. The circuit of FIG. 1 is includedfor comparison with the corresponding welded wire module which is shownin detail in FIGS. 2 through 1l. In this connection, it may be notedthat the writing coil L1 is not included in the module but is physicallyassociated with the drum.

The nature of the specific circuit of FIG. 1 will now be consideredbriefly. The circuit of FIG. 1 supplies pulses of selected polaritythrough the coil L1 to selectively magnetize the associated drum. Thisis accomplished by directing current from the 12-volt source connectedto the terminal 102 either through the upper or lower portion of thecenter tapped coil L1. The current from the terminal 102 is selectivelydirected through one of the portions of coil L1 by turning eithertransistor Q3 to transistor Q4 on, and thus providing a low impedancepath from terminal 102 to the ground lead 104. The buffer transistors Q1and Q2 are provided to drive the switching transistors Q3 and Q4,respectively.

Now that the basic circuit components have been considered, some of thedetails will also be noted. Initially, there are a number of resistorsconnected to the 12-v0lt power source which provide proper operatingpotentials to the transistors. These include resistors R1, R3, R7 andR9, for example. The Zener diodes D2 and D6 are provided to clamp thevoltage level at the emitters of transistors Q1 and Q2 when thesetransistors are deenergized. They may, for example, clamp them 'at a -3volt level.

The capacitor C3 provides much of the energy for the pulses throughWriting coil L1. It is, of course, charged from the 12volt sourcebetween pulses. The load circuit for the writing coil L1 includescurrent limiting resistors R4 and R5 for one polarity of writing pulses,and resistors R and R11 for the other polarity. Two resistors are placedin parallel in each case in order to obtain the proper current level,and to split theheat dissipation between two resistors in each circuit.

The resistor R6 serves to dissipate the energy in the magnetic iieldcaused by current owing through the coil L1, when the transistor Q3 orQ4 is turned off. In the absence of resistor R6, the energy might damageone of the transistors.

The diodes D3 and D7 serve to protect the base-toemitter junction oftransistors Q3 and Q4, respectively. In the absence of diodes D3 and D7,the base potential could drop to the 12 volt level of the current supplyapplied across resistor R9. Under these circumstances, thebase-to-emitter circuit could be damaged as they are lonly designed towithstand three volts in the reverse direction. The diodes D1 and D5perform similar protective functions for transistors Q1 4and Q2,respectively. However, they are placed in series with thebase-to-emitter junction and avoid possible breakdown by this location.

The circuit of FIG. l was picked as a typical active circuit forillustrating the present welded wire module technique. Theimplementation of this circuit in terms of its physical constructionwill now be considered in connection with subsequent figures of thedrawing.

The circuit of FIG. l, with the exception of the coil L1, appears in themodule shown in FIGS. 2 through 11 of the drawings. The general outlineof module may be observed from the two mechanical drawing views of FIGS.2 and 3. The view of FIG. 5 is taken from the opposite side of themodule than that of FIG. 3. The successive sections 4 4 and 6 6 through11-11 are shown individually in FIGS. 4 and 6 through 1l, respectively.

With particular reference to FIGS. 2 through 5, a special molded block106 includes the four transistors Q2 through Q4. As clearly shown inFIGS. 3, 4 and 5, two transistors Q1 and Q3, have their three electrodesextending from one end of the molded Iblock 106 and the other twotransistors, Q2 and Q4, have their terminals extending from the oppositeend of the block. As the transistors Q 2 and Q3 are much shorter thanthe width of the block 106, these two transistors are locatedback-toback at one end of the block 106 as indicated in FIG. 4.

The next layer adjacent and above the transistor block 106 may be seenin FIG. 6 which is taken as indicated by lines 6 6 of FIG. 3. This`first layer includes the resistor R3 and two capacitors C1 and C5. Theyare mounted on the perforated nickel bus strip 108. The nickel strip 108has a series of holes 110 along its length. At each edge, the nickelstrip 108 carries a number of preformed tabs 112 which may be readilybent up perpendicular to the plane of the strip 108 for securing toelectrical components or leads.

The strip 108 is made of nickel in order to facilitate the numerouswelding operations which are involved. Each of the components in thelayer shown in FIG. 6, and normally in all layers associated with anickel strip, are secured to a strip. This may be accomplished either byelectrical connections or lby a suitable cement. Thus, for example, thecomponents R3, C1 and C5 are glued or cementedk to the strip 108. Inaddition, resistor R3 has its lower lead 114 secured to a tab 116 whichhas been bent up from the plane of the strip 108. As noted above, thenickel strip 108 has a series of tabs 112 prepared for bending andwelding to electrical components. The interconnection of lead 114 andtab 116 typiiies this operation. In general, the nickel strip isemployed to carry voltage levels or signals which are common to a numberof the components in the particular layer. In the present case, forexample, the nickel strip is maintained at the -12 volt transistorsupply voltage.

In FIG. 6 there are a series of numbered rectangles shown above andbelow the layer. These numbered rectangles refer to positions for theriser wires indicated generally at 118 and 120 in FIGS. 3 and 5. As maybe observed in these gures, there are seven riser wire positions on eachside of the module. However, only selected wires are present at variouspoints along the length of the module. In FIG. 6, however, seven riserwire positions appear on either side of the particular layer which isshown. FIG. 12 is a diagram indicating the connections of the variousriser wires in each layer or S11-bassembly. Thus, for example, withreference to the row designated layer 6 6 in FIG. 12, it may be seenthat the riser wire column 13 appears about half-way across FIG. 12. Atthe bottom of the table of FIG. 12, it may be seen that riser wire 13 isconnected to the l2 volt transistor supply potential. With reference toFIG. 6, it may be seen that the nickel strip 108 is connected by lead122 to riser wire 13. It has been noted previously that one terminal 114of resistor R3 is connected to nickel strip 108 by the tab 116. Thisconnection may be veried Iby reference to the drawing of FIG. 1 in whichthe resistor R3 is shown connected between -12 volts and the baseelectrode of transistor Q3.

FIG. 7 is taken along the lines 7 7 of FIG. 3. In addition to thecomponents, including diodes D6 and D7, resistor R8 and capacitor C2,the layer of FIG. 7 includes the nickel strip 124. The nickel strip 124is connected by lead 126 to riser wire position 8. As shown in FIG. l2,riser wire position 8 represents ground potential. To verify thisanalysis, it may be noted that diodes D6 and D7 are connected by tabs128 and 130, respectively, to the grounded nickel strip 124. This may beconfirmed by reference to FIG. 1 in which diode D6 is shown connectedfrom ground to the emitter of transistor Q2, and in which diode D7 isshown connected from ground to the base of transistor Q4.

The layer subassembly of FIG. 8 is taken as indicated by lines 8 8 ofFIG. 3. This layer includes the two diodes D2 and D3, resistor R2, andcapacitor C4. The nickel strip 132 is connected to riser wire position14 by the tab 134 and lead 136. As noted previously by reference to thetable of FIG. 12, riser wire position 14 represents ground along theentire length of the module. Nickel strip 132 is therefore grounded. Itmay be noted that one terminal of diode D3 and capacitor C4 are shown inFIG. 8 as being grounded to the nickel strip 132. As seen in FIG. 1, D3is indeed connected between ground and the base of transistor Q3.Similarly, filtering capacitor C4 is shown in FIG. l as connectedbetween ground and the l2 volt source. In this regard, it may be notedthat the ltering capacitors are spread out in individual modules to cutdown on cross-coupling, instead of the conventional practice ofincluding a larger capacitor in the power supply.

The layer of FIG. 9 includes diodes D1 'and D5 and resistors R1, R7, andR9. The nickel strip 138 is connected by lead 140 to riser wire position13 and thus to the l2 volt level. The .physical connections of all threeresistors R1, R7 and R9 to the l2 volt nickel stri-p 138 may be verifiedfrom the electrical connections shown in the circuit diagram of FIG. l.

FIG. l0 is taken as indicated by lines 10 10 of FIG. 3. The layer ofFIG. 10 includes two diodes D4 and D8, in addition to tive resistors R4,R5, R6, R10 and R11. The connections of layer 10 show resistors R4 andR5 connected to one terminal of diode D4. As indicated in the circuitdiagram of FIG. 1, these elements are so connected .in the collectorcircuit of transistor Q3. The table of FIG. 12 through cross-referenceto the transistor layer designated 4 4, indicates that the collectorelectrode'of transistor Q3 is connected to riser wire No. 1. As seen inFIG. 10, resistors R4 and R5 have two of their terminals connectedtogether to riser wire 1, thus confirming the table of FIG. 12 and thecircuit diagram of FIG. l. Diode D8 and resistors R10 and R11 are alsoconnected to a common point, and the two other terminals of resistorsR10 and R11 are connected to riser wire 12. As indicated in the table ofFIG. 12, riser wire 12 Iis connected to the collector of transistor Q4,thus confirming the circuit of FIG. 1.

As mentioned above, the interconnection arrays on either side of themodule may be located in two or three planes, successively spacedoutward from the ends of the components which are stacked up in themodule. The connections in these arrays include the riser wires shown at118 and 120 in FIGS. 2 and 5 which are normally spaced farthest out fromthe components. These riser wires are oriented perpendicular to theplanes of the bus strips which separate the layers of the module. Insidethe plane of the riser wires, closer to the components, are the leadsIwhich interconnect components within the layers. These leads extend ina direction parallel with the bus strips and perpendicular to the axisof the components. In the active module shown in FIGS. 2 through 11 ofthe drawing, most of these connections may be made in a single plane.4More generally, however, two planes are require-d, with one set ofinterconnection wires parallel to the other but spaced at a slightlydifferent distance from the ends of the components. In FIG. 10 such anarrangement is shown in which the interconnection lead 139 is spacedclose to the ends of the resistors R4 and R5 and the diode D4 which itinterconnects. The wires 141 and 143 are located in a plane which isspaced outwardly from the plane of the wire 139. Through experience ithas been found that wires located in three spaced planes locatedoutwardly -from the ends of the components are suicient to interconnectany normal modular circuit array, and that with some simple modules theleads may be in two spaced planes.

FIG. 11 is the final cross-sectional view taken as indicated by lines11-1-1 of FIG. 3. It includes two com-ponents, resistor R12 andcapacitor C3. The large size of capacitor C3, which provides the powerfor the writing.

pulses, requires that it be oriented crosswise with respect to the othermodule elements. Resistor R12 which is associated with capacitor C3, asshown in the circuit diagram of FIG. 1, forms the only additionalcomponent in the layer of FIG. 11. These two components are clearlvphysically connected in the manner indicated in the circuit dia-gram.

A brief additional explanation of the desi-gnations ernployed in thetable of FIG. 12 is appropriate. First, with reference to layer 4 4, thetransistors are designated by their numbers and a single letter E, B orC to indicate the emitter, base, or collector electrodes, respectively.Thus, the designation Q3-B represents the ybase electrode of transistorQ3. The input-output extension portions of the riser wire leads apedesignated at the bottom of the table of FIG.- 12. These are theinterconnections of the module with other portions of the system, andthese riser wire leads are the only connections extending ybeyond themodule. The positive and negative -12 volt designations are obvious, andthe meaning of the ground and the signal ground designations is alsoapparent. The designations W-l and W40 stand for write 1 and write 0,respectively, and refer to the input signals to transistors Q1 and Q2,respectively. Write 1 and Lwrit/e refer to writing a binary signal,either a 1 or a 0, by applying positive or negative pulses to themagnetic drum, through selective energization of coil L1. The threeoutput terminals from the module which are to be connected to the coilL1 of the write head, are the HD-tl, the HD-l, and the HD-2 terlminals,with the HD designation standing Ifor head These signals appear on riserwires 10, 7 and 2, respectively.

As mentioned previously, FIGS. 3 and 5 represent views of the modulefrom opposite ends. The components which are readily visible in theseiigures carry reference designations corresponding to those used inother figures of the drawing.

The module `descri'bed in the foregoing detailed description may bedesignated an active module as contrasted with the logic module whichwill now be more 'briefly described.

The logic modules differ from the active modules in certain minorrespects, but 'follow the same overall pattern in which ladders or busstrips, and additional crossconnections and riser wires are employed. Asin the case of the active modules, the interconnections in the logicmodules follow a regular pattern Iin accordance with rectangularcoordinates. This regularity of interconnections permits step-by-stepconnections of the components within the layer su-bassemblies andsubsequent systematic and regular interconnection of the layers =byriser Wires.

In both the active and the logic modules, the ladders are employed forthe electrical connection which is common to the greatest number ofcomponents on the particular layer. In the case of active modules, thiscommon voltage is normally either the transistor supply voltage orground. In the case of diode logic circuits such as will ibe consideredin the following description, the common signal output from a set ofdiodes forming an AND or an IOR gate normally appears on the associatednickel welding or .bus strip.

FIG. 13 shows a typical logic module. It includes a series of layers,the majority of which includes two diode logic gates. The detailednature of the module structure will 'be explained in greater detailbelow. At the present time, it is suflicient to note that a series ofnickel Ibus strips 142 are employed and that there are two such stripsof the type described above between each row of components. Theinsulating vstrips 144 separate each pair of adjacent bus strips 142. Itmay also .be noted that the array of FIG. 13 is more regular than thatof FIG. 3. This difference arises from the lfact that logic circuitscharacteristically include only diodes and resistors, whereas activemodules normally include other components such as capacitors andtransistors.

The riser wires 146 extend from the module of FIG. 13 and areinterconnected with other modules forming the data processing system148. The bistable multivibrator which also appears in FIG. 13 is part ofone of the other modules. The 0 output of the bistable multibrator 150is connected to one of the riser wires 152, and the 1 output ofmultivibrator 150 is connected to the corresponding riser wire 154 whichis located directly behind and opposite riser wire 152 on the other sideof the module. One ofthe output leads of the multivibrator 150 willalways be deenergized when the other one is energized. For reasons whichwill be discussed in detail later, it is advantageous to connect thesetwo output leads to a pair of aligned riser wires.

Detailed consideration will now be given to two of the sandwiched layerswhich are shown in FIG. 13. The layer 156 of FIG. 13 includes thecircuit elements shown in FIG. 14. Thus, it includes an AND gate formedof the diodes D11 and D12 in combination with the resistor R13. An ANDgate, by definition, is a circuit which produces an output signal onlywhen all of its input leads are energized. For convenience, the riserwires to which the various diodes are connected are shown in circles inFIG. 14. A second AND gate shown in FIG. 14 includes four diodes D13through D16 and the resistor R16. The common output of the diodes D11and D12 is connected to one of the two bus strips bracketing layer 156,While the output from the AND gate made up of diodes D13 through D16 isconnected to the other ladder. The two AND gates noted above are coupledthrough an OR gate, formed by diodes D17 and D18 to the riser wire 18.An OR gate, by definition, is a circuit which produces an output signalwhen any number of its input leads are energized.

The physical orientation of the subassemblies forming each of the twoAND gates, and their associated OR diodes, is shown in FIG. 15. FIG. 15also shows the relationship of the subassemblies as secured to theladders, with respect to the riser wire positions. In FIG. 15 theseriser wire positions are shown by the encircled numbers designated 1through 24. The right-hand side of FIG. 15 shows the lower AND gateincluding resistor R16 and diodes D13 through D16 and the associated ORgate diode D18. The left-hand side of FIG. 15 shows the upper AND gateof FIG. 14 including diodes D11, D12 and R15, and the associated OR gatediode D17.

FIG. 15 represents layer 156 of FIG. 13 unfolded so that the two nickelstrips together with the components associated with each strip, are`shown individually. In considering FIG. 15, the dash-dot line 158 maybe considered to be located to the right of the end of layer 156 in FIG.13, and the upper bus strip and its associated components may bethrought of as rotated about line 158, as the sandwich forming layer 156is unfolded. Thus, with respect to layer 156 in FIG. 13, the resistorR16 is actually located adjacent resistor R15 at the left-hand end ofthe layer. Similarly, comparing FIGS. 15 and 13, diode D12 is located atthe right-hand end of layer 156 adjacent diode D14. It is evident,therefore, that there is no conflict between the component positions ofthe two gates which are included in layer 156.

In a similar manner, layer 160, the lowermost layer of FIG. 13, is madeup of two AND gates which are shown in FIGS. 16 and 17, and the relativepositions of the included components are shown in FIG. 18. The manner oflocation of the components and the operation of the circuit is identicalwith that which has been explained in detail in connection with FIGS. 14and 15. The correspondence between the part numbers and the positions inthe drawing indicate the exact arrangement of the components.

It is evident from the foregoing discussion that logic circuits may bearranged in modular form by interconnecting riser wires and a bus stripwith a series of diodes and resistors. The physical location of thediode is normally determined by the location of the riser wire withwhich itl is to be connected. It is also evident, for purposes of highcomponent packing densities and simplicity of interconnections, that thesame component space should be allocable to only one component. Asmentioned above, any particular logic circuit will normally not require,as inputs, both of the paired output signals from a multivibrator. Thus,if an AND gate has, as one input, the output from a bistablemultivibrator, such as the circuit 150 of FIG. 13, it will not `alsohave as an input the l output of the multivibrator. Therefore, if Ithetwo outputs of the multivibrator a-re connected to opposed riser Wiresin the front and the back of the modules, the component space in anyygiven layer will be available for connection to one or the other ofthese two multivibrator outputs but not for both of them', accordingly,this type of arrangement of the multivibrator output signals, in alignedriser wire positions, on opposite sides of the module, make for higherpacking densities in logic circuit modules. Paired output signals fromsources other than multivibrators are advantageously connected to thelogic modules in the same manner.

In FIG. 13, the diode D11 is connected to the riser wire 152,representing the 0 output of the multivibrator 150. Similarly, the diodeD24 is connected to the riser wire 154 (standardized riser wire positionNo. 4), which is, in turn, connected to the 1 output of the bistablemultivibrator 150. The connections to the two outputs of themultivibrator 150 in different logic circuits indicates the diodeinterconnections with opposed riser wires forming the outputs of amultivibrator `as discussed in some detail in the preceding paragraph.While only one such multivibrator connection to a pair of riser wires isshown in FIG. 13, other comparable circuits included in 10 the dataprocessing circuit 148 may also be connected to corresponding opposedpairs of the riser wires 146.

The method of construction of the modules discussed above will now beconsidered. Initially, the individual layers are prepared as shown inFIG. 19. As the layers are stacked together as shown in FIG. 20, properlayer spacing is maintained by the beads 168 which are threaded on theassembly rods 164 and 166. The main supporting frame member 170 isprovided with a series of central holes 172 in which rods 164 and 166may be selectively located to provide the desired module width. Inaddition, at the outer edges of the frame member 170, there are a seriesof smaller holes 174 through which riser wires may subsequently beinserted.

FIG. 2l shows a module in which the electrical connections have beencompleted. Thus, the riser wires 176 have been inserted through theopenings in the frame member and secured to appropriate connections atthe various layers. In addition, the riser Wires have been clipped wherenecessary to make the desired electrical connections and avoid undesiredshort circuits. The next step following the showing of FIG. 20 is toremove the frame members and encapsulate the unit. The completed moduleis shown in FIG. 22. The riser wires 176 may be observed extending fromthe encapsulated unit. In addition, the U-shaped channel 178 of metal,preferably aluminum, and the encapsulating material 180 are clearlyshown in FIG. 22.

At this point, it is useful to mention the unique thermal properties ofthe present electronic modules. T-hese properties are achieved throughthe use of the bus strips of metal which are associated with eachstandardized layer of the assembly. These strips, in combination withthe standardized wiring interconnections, provide high heat flowcapacity with readily predictable thermal properties. The heat flow fromthe electrical components, through the bus strips and other electricalconnections to the aluminum channel 178 which forms the outer wall ofthe encapsulated module may be easily predicted, when considered incombination with the heat dissipation figures of the electricalcomponents. In connection with the thermal predictability of the modularunits, it is noted that the encapsulating material which may be employedcan be selected to ll the heat dissipation requirements. T-hus, forexample, where predictions indicate that low thermal conductivitymaterial is adequate, a relatively light foam type encapsulatingmaterial, such as polyurethane foam, may be used. However, where highthermal conductivity properties are required in View of the high heatdissipation in a particular module, a filled epoxy may be employed.Thus, weight may be reduced when heat dissipation is not a criticalfactor. This capability of the present modules is particularly importantfor airborne applications, or the like, where weight is often a criticalfactor.

In the foregoing description, the individual layers shown, for example,in FIGS. 6 through 11 have included components mounted on a bus strip.The bus strip was perforated in these embodiments and included preformedbendable tabs for connection to the individual component leads. Thelayers also include leads for completing the connections betweencomponents. As mentioned above, the bus strip could also take the formof two or more parallel wires interconnected by cross wires to form atrue ladder-like array. One suc'h arrangement is shown in FIG. 23 of thedrawings. In this gure, the layers include a pressure sensitive tape 202having its adhesive surface facing upward. Mounted 4on this surface area row of electronic components 204. These electronic components aresecured to the pressure sensitive tape both by means of the adhesivesurface of t-he tape and through electrical and mechanical connectionsto one or more of the sets of nickel wires 206 and 208 which extendalong the pressure sensitive tape at the sides of the electricalcomponents 204. The innermost of the nickel lll wires 206, 208 may besecured together'by suitable crossbridging wires 21) and 212 to form abus strip.

Electrical connections may be made between the electrical componentsthrough the wires 206, 208. Thus, for example, the two end componentshave their leads 214 and 216, respectively, connected together by bentportions 218 and 220, respectively, of one of the nickel wires. 'Ilhenickel wires are bent out of their normal linear orientation to engagethe desired components and the resultant V-sha-ped bends are welded tothe leads from the individual components. In order to avoid undesiredshort circuits, the wire may be bent out of its normal position and theV-shaped bent portion of lthe wire may be clipped. Typical breaks ofthis type are shown at 222. Virtually any desired pattern ofinterconnection may be made by this arrangement. The connections fromthe various wires to the leads correspond in function both to theconnections formed by tabs from the nickel strips and also to the layerinterconnections such as leads 139, 141 and M3, as shown in FIG. 10. Theresultant layers may readily be assembled into a imodule interconnectedby riser wires in the manner disclosed above and other forms of layerconstruction.

The arrangement of FIG. 23 has several advantages over layerconstructions using the nickel strips described above. Thus, forexample, the pressure sensitive tape may be much thinner than the nickelstrip, resulting in a reduction in volume of the module of about tenpercent. Furthermore, the tape and wires can be fed from spools, and thewires can be bent before they are pressed onto the tape, so that anydesired pattern of connections can be made.

In considering the advantages of the present welded wire modules, t-heuse of regularly spaced interconnection arrays for` the electroniccomponents should -be stressed. Thus, as clearly shown in FIGS. 3 and13, there is `an inner set of regularly spaced Llayer connections whichextend parallel to the ladders or nickel strips forming part of themodular layers. These layer connections serve to interconnect componentswithin a given layer, and may be formed prior to assembly of thesuccessive layers with one another. It may also be noted that the layerconnections for all the layers are located generally in a plane ateither end of the velectronic components. When more complex layerinterconnections are required, they may be located in two successiveclosely-spaced parallel planes, as noted above. The riser Wires shown at118 and 120 in FIGS. 3 and 5, respectively, and at 146 in FIG. 13, arelocated in a third plane, parallel to the layer interconnection planes.These riser wires are also regularly spaced and extend perpendicular tothe layer interconnection wires. The two sets of cross-connections forma pair of interconnection arrays located on opposite sides of themodule.

This systematic method of component interconnection has severaladvantages: lirst, it permits complete subassemblies to be made prior tothe assembly of the layers with one another; this permits theutilization of relatively unskilled assembly workers. Secondly, theregular nature of the arrays will permit ultimate mechanization andautomation of the welding interconnections. In addition, as noted above,the elapsed time from design to production may be greatly reduced, as nocomplex circuit boards or printed wiring need be produced.

It is t be understood that the above-described arrangements areillustrative of the application of the principles of the invention.Numerous other arrangements may be devised by those skilled in the artwithout departing from the spirit and scope of the invention. Thus, byway of example and not of limitation, the bus strips which Iareassociated with layers in the module may take the form of pairs ofstraight wires having numerous cross-connections forming a structurewhich more closely represents an actual ladder; other circuits, inaddition to the simple active coil-driving circuit and the simple logicmodule described above may be implemented by the present modulartechniques; and other minor modications of the structural and electricalinterconnections of the module may also clearly be accomplished.Accordingly, from the foregoing remarks, it is to be understood that thepresent invention is to be limited only -by the spirit and scope of t-heappended claims.

In the claims:

l. In an electrical circuit module having a length tailored to thecomplexity of the circuit, a plurality of parallel layers of electricalcomponents, a series of elongated conducting bus strips having a Widthsubstantially greater than their thickness separating said layers, meansfor interconnecting some of the electrical components on said layerswith the associated conducting bus strips, and means including a wiringarray for interconnecting said components, said array including a set ofregularly spaced layer interconnection wires extending parallel to saidbus strips in a plane along one side of said module perpendicular tosaid components, and a set of regularly spaced riser wires extendingperpendicular to said bus strips in another plane spaced outwardly fromand generally parallel to the layer wiring plane, said bus strips andwiring array having adequate mechanical strength to provideself-suicient mechanical interconnection of the components.

2. In an electrical module, a plurality of parallel layers of electricalcomponents, a series of elongated conducting bus strips having a widthsubstantially greater than their thickness separating said layers, meansfor connecting one terminal of a plurality of the same type ofelectrical components on one of said layers with the associated busstrip, means including two regular wiring arrays located on respectivelyopposite sides of said module `for interconnecting said components, eachof said arrays including a set of regularly spaced layer interconnectionwires extending parallel to said conducting bus strips in a plane closeto the ends of said electrical components and a set of regularly spacedriser wires extending perpendicular to said conducting bus strips inanother plane spaced outwardly from said layer Wiring plane, and meansfor connecting an active circuit having two different outputs torespective opposed riser wires on opposite sides of said module, one ofsaid riser wires being connected to another terminal of one of saidplurality of components.

3. In an electrical module, a -plurality of parallel layers ofelectrical components, an elongated conductive bus element associatedwith each of said layers, each of said bus elements having an over-allwidth of conductive material several times greater than its thickness tofacilitate electrical connection to the common point in an electricalcircuit formed by said bus strip at either end of each of saidcomponents, means for interconnecting some of the electrical componentson said layers with the associated conducting elements, and meansincluding a wiring array for interconnecting said components, said arrayincluding a set of regularly spaced layer interconnection wiresextending parallel to said conducting elements in a plane perpendicularto and close to the ends of the electrical components, and a set ofregularly spaced riser wires extending perpendicular yto said conductingelements -in another plane spaced outwardly from and generally parallelto said layer wiring plane, said bus elements and said wires being ofsufficient rigidity to independently hold said components in theirproper relative positions.

4. In an electrical module a plurality of parallel layers of electricalcomponents, a series of elongated conducting elements having a widthlsubstantially greater than their thickness separating said layers,means for interconnecting some of the electrical components on saidlayers with the associated conducting element, means including two regu-`lar wiring arrays located on respectively opposite sides of said modulefor interconnecting said components, each of said arrays including a setof regularly spaced layer interconnection Wires extending parallel tosaid conducting elements in a first plane and a set of regularly spacedriser wires extending perpendicular to said conducting elements inanother plane spaced outwardly yfrom said iirst plane, a source of twobinary electrical signals which are opposite in Value, and means forconnecting the two signals to respective opposed riser wires.

S. In a welded wire module, a plurality of successive modular layersmounted on top of each other, each including a bus strip having a'widthsubstantially greater than its thickness and a .plurality of electricalcomponents mounted on one side of said strip parallel to each other andperpendicular to the length of said strip, some of said components beingwelded to said strip, means for connecting selected components in alayer by leads extending parallel to said strips, and riser wiresextending perpendicular to the planes of the strips to make connectionswith different layers, said riser wires being located adjacent the endsof the components in said layers, and extending beyond the modules toyform terminals for the module, said bus strips, leads, and wires beingof suicient rigidity to independently hold said components in theirproper relative positions.

6. In an electrical module, a plurality of parallel layers of electricalcomponents, conductive bus elements having a width greater than theirthickness associated with said layers, said bus element being generallycoextensive with said layers, means for interconnecting some of theelecltrical components on. said layers with the associated conductingelements, and means including a wiring array for interconnecting saidcomponents, said array including a set of regularly spaced layerinterconnection wires extending parallel to said conducting elements ina plane at the ends of the elements, and a set of regularly spaced riserwires extending per-pendicular to said conducting elements in anotherplane spa-ced outwardly from and generally parallel to said layer wiringplane.

7. In a welded wire module, a plurality of successive sandwiched layersmounted on top of each other, each including a pair of conductive busstrips having a width Agreater than their thickness and a plurality ofelectrical components mounted 4between said strips, some of saidcomponents being Welded to each of said strips.

8. In a welded wire logic module, a plurality of successive sandwichedlayers mounted on top of each other, each including a pair of conductivebus strips having a width .greater than their thickness and a pluralityof electrical components including diodes mounted between said strips,at least two diodes included among said components being connected toeach of said strips.

9. In a logic module, a plurality of successive layers mounted on top ofeach other, each layer including a conductive bus strip, a plurality ofelectrical components including 4diodes mounted between adjacent strips,each of said bus strips having an over-al1 width of electricallyconductive material several times greater than its thickness tofacilitate electrical connection to a common point in the electricalcircuit at either end of each of said components, at least two diodesincluded among said components Welded to an adjacent conductive strip.

10. In a welded wire logic module, a plurality of successive sandwichedlayers mounted on top of each other, each including a pair of strips ofconductive material having a width greater than their thickness, aplurality of electrical components including diodes mounted between saidstrips, at least two diodes in one of said layers *being Welded to oneof said strips, at least two additional diodes in the same one of saidlayers being welded to the other of said conductive strips.

11. In an electrical module, a plurality of parallel layers ofelectrical components, an elongated conductive bus element having awidth greater than its thickness associated with each of said layers,means for interconnecting some of the electrical components on saidlayers with the associated conducting elements, and means including awiring array for interconnecting said components, said array includingtwo sets of regularly spaced layer interconnection wires extendingparallel to said conducting elements in spaced adjacent planesperpendicular to and close to the ends of the electrical components, anda set of regularly spaced riser wires extending perpendicular to saidconducting elements in another plane spaced outwardly from and generallyparallel `to said layer wiring planes.

12. A welded wire module comprising a series of layers of electroniccomponents, elongated bus strips having a width greater than theirthickness mounted between said layers, and means for welding said busstrips to the terminals of selected adjacent components.

13. A module as defined in claim 12 wherein said bus strips -are made upof pairs of Wires at the ends of said electronic components andinterconnection wires extending parallel to the electronic componentsand interconnecting each pair of wires.

14. A welded wire modular circuit comprising a plurality of layers ofparallel electrical components, elongated bus strips mounted betweensaid layers and extending perpendicular to said electrical components,said bus strips having an over-all width of conductively connectedmaterial several times greater than their thickness to facilitateelectrical connection to a common point in the electrical circuit ateither end of each of said components, and means for welding said Vbusstrips to the terminals of selected components adjacent said strips.

15. In an electrical module, a plurality of parallel layers ofelectrical components including some diodes, a series of elongatedconducting bus strips separating said layers, said bus strips having awidth of conductively connected material greater than their thickness,means for connecting one terminal of a plurality of said diodes on oneof said layers with the associated bus strip to form a diode gate, meansincluding two regular wiring arrays located on respectively oppositesides of said module for interconnecting said components, each of saidarrays including a set of regularly spaced layer interconnection wiresextend-ing parallel to said conducting bus strips in a plane close tothe ends of said electrical components and a set of regularly spacedriser wires extending perpendicular to said conducting bus strips inanother plane spaced outwardly from said layer wiring plane, and meansfor connecting an active circuit having two different outputs torespective opposed riser wires on opposite sides of said module, one ofsaid riser wires being connected to another terminal of one of saiddiodes.

References Cited by the Examiner UNITED STATES PATENTS 2,816,253 12/1957Blitz 317-101 2,851,219 9/1958 Hussey 307-88 2,874,313 2/1959 Githens307-88 2,911,572 11/1959 Francis et al. 29-155 X 2,977,672 4/ 1961Telfer 174-68 X 2,985,709 5/1961 Mammola 174-68 3,098,951 7/1963 Aver etal.

3,151,278 9/1964 Elarde 174-68 X 3,157,828 11/1964 Flaherty 29-155 X3,162,788 12/1964 Allen et al. 317-101 3,177,405 4/ 1965 Gray 317-1013,179,854 4/1965 Luedcke et al. 317-101 ROBERT K. SCHAEFER, PrimaryExaminer.

I. P. WILDMAN, I. F. BURNS, K. H. CLAFFY, R. S.

MACON, Examiners.

D. CLAY, I. G. COBB, W. C. GARVERT,

Assistant Examiners.

1. IN AN ELECTRICAL CIRCUIT MODULE HAVING A LENGTH TAILORED TO THECOMPLEXITY OF THE CIRCUIT, A PLURALITY OF PARALLEL LAYERS OF ELECTRICALCOMPONENTS, A SERIES OF ELONGATED CONDUCTING BUS STRIPS HAVING A WIDTHSUBSTANTIALLY GREATER THAN THEIR THICKNESS SEPARATING SAID LAYERS, MEANSFOR INTERCONNECTING SOME OF THE ELECTRICAL COMPONENTS ON SAID LAYERSWITH THE ASSOCIATED CONDUCTING BUS STRIPS, AND MEANS INCLUDING A WIRINGARRAY FOR INTERCONNECTING SAID COMPONENTS, SAID ARRAY INCLUDING A SET OFREGULARLY SPACED LAYER INTERCONNECTION WIRES EXTENDING PARALLEL TO SAIDBUS STRIPS IN A PLANE ALONG ONE SIDE OF SAID MODULE PERPENDICULAR TOSAID COMPONENTS, AND A SET OF REGULARLY SPACED RISER WIRES EXTENDINGPERPENDICULAR TO SAID BUS STRIPS IN ANOTHER PLANE SPACED OUTWARDLY FROMAND GENERALLY PARALLEL TO THE LAYER WIRING PLANE, SAID BUS STRIPS ANDWIRING ARRAY HAVING ADEQUATE MECHANICAL STRENGTH TO PROVIDESELF-SUFFICIENT MECHANICAL INTERCONNECTION OF THE COMPONENTS.